Ask Better Questions!

Do you have need to cluster groups of components together, based on a schematic page or set of pages, or a hierarchical level in the design?

Do you have need to place  a section of a design once, and repeat the placement multiple times with variants, either from a flat or hierarchical schematic?

Do you have need to take advantage of your existing design investments, be those investments in either a flat or hierarchical design format.

Do you need to integrate the constraint,
schematic, and layout views, as well as cross
probing and integrating content between
different EDA tools?

Do you need to perform FPGA pin optimization
that takes into account the constraints of both
the FPGA and PCB design?

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Take advantage of advanced
early placement technologies, clustering, and placement pattern recognition?

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Take advantage of existing design reuse, creating reusable modules from both hierarchical and flat schematics?

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Optimize  FPGA pin assignments taking into account both the constraints of the FPGA and the PCB designs.

THE PROBLEMS ARE GETTING WORSE
OUR SOLUTION, EASIER!

PCB Planner™ dramatically decreases the time to market for new product introductions by addressing the key bottlenecks within the Systems and PCB design flows. These tools facilitate the interaction between the Circuit Engineer, PCB Designer, and test and manufacturing organizations. Our goal is to reduce the EDA product development cycle time enabling Engineers and Designers to collaborate, develop, and release new products faster.

Advanced Placement and Clustering - Customers have achieved a productivity time savings between 4 to 10X, using advanced placement automation and clustering technologies. Components can be clustered and grouped directly from schematic pages, property, or a hierarchical tree.

Templates - Many of our customers’ existing PCB level IP are represented in flat schematic designs, often with repeated and variant patterns throughout the design. The PCB Designer can select, from the schematic, groups of components, creating a design reuse template. They can then use this template to step and repeat previous placement patterns onto the PCB.

Design Reuse Models -  Board PCBs are becoming more and more complex. Engineering and CAD organizations must take advantage of their existing IP and design reuse to meet the “time to market” pressures of today’s market space. Using Design Reuse Modules (DRUM’s), patterns of logic circuitry and board placement and routing can be saved and reused from existing IP. These DRUM’s can take advantage of existing IP in flat or hierarchical schematic formats, and can be mapped to future boards with different layer stack ups and mirroring requirements.