Ask Better Questions!

Are your projects being delayed waiting on schematic symbols?

 Are your librarians or engineers wasting critical time creating or waiting for schematic symbols right at the critical choke points of your design cycle?

Do your engineers waste hours with Excel reports attempting to annotate schematic symbols after FPGA optimization or Layout changes?

Are you able to take advantage of existing symbol models supplied by your vendor, even though you vendor may supply you those models for a different EDA tool.

Do you have need to cluster groups of components together, based on a schematic page or set of pages, or a hierarchical level in the design?

Do you have need to place  a section of a design once, and repeat the placement multiple times with variants, either from a flat or hierarchical schematic?

Do you have need to take advantage of your existing design investments, be those investments in either a flat or hierarchical design format.

Do you need to integrate the constraint,
schematic, and layout views, as well as cross
probing and integrating content between
different EDA tools?

Do you need to perform FPGA pin optimization
that takes into account the constraints of both
the FPGA and board design?

CadPlex Software is proud to announce that we are now part of the PCB Matrix Team.  One company,  one team, bringing you the complete integrated line of innovative software products for printed circuit board design.   From the  industry's #1 land pattern calculator and library generator, through Symbol Wizard  automating schematic symbol generation, through PCB Planner for early placement and board level design reuse.  One company, one team, one voice, one integrated solution.

  Click here for SYMBOL WIZARD

Click here for PCB PLANNER