The degree of difficulity of translating full schematic designs is often under-estimated. The individual constructs of one particular EDA drawing format may be completely different than similar constructs in a second format. For example, DxDesigner represents busses as direct attachmeents of wires into a bus, while Cadence Concept HDL requires a splitter with the wires to be pulled back from the bus by one grid.

To obtain a high degree of interoperability, we have focussed our attention to a very specific market opportunity. Our focus is only DxDesigner translation to Cadence OrCAD Capture or Cadence Concept HDL. We do not attempt to provide a "one size fits all" generic translation products or services.

We do more than translate your design. We take the final design through the PCB Packager, extract a PCB Design Netlist, and compare the netlist from the translated schematic to the original PCB Design Netlist extracted from DxDesigner. That is the only way that you have assurance that the translation functioned correctly. Without a full design comparison, you are simply gambling with your design integrity.